Transmission of multi-bit words typically occurs over multi-wire buses. For example, an eight-bit word may be transmitted over a bus having eight wires, one wire for each bit. But in such conventional busses, each bit carried on a given wire is independent of the remaining bits. As the data rates increase, the resulting signaling becomes problematic in that the various bits in a word become skewed from each other as the word propagates over the bus.
Given the issues with skew between multiple bits in high-speed communication, various serializer/deserializer (SERDES) systems have been developed. A SERDES transmitter serializes a multi-bit word into a series of corresponding bits for transmission to a receiver. There can then be no such skew between adjacent bits on a multi-wire bus since a single transmission line (which may be differential) is used in a SERDES system. The SERDES receiver deserializes the received serial bit stream into the original word. However, the SERDES transmission line and the receiver load introduce distortion as the data transmission rate exceeds, for example, 10 GHz. Adjacent bits in the serial bit stream then begin to interfere with each other. Complicated equalizing schemes become necessary to fight the resulting inter-symbol interference and thus it becomes difficult to push SERDES data transmission rates ever higher.
To increase data transmission rates over the SERDES limitations, a three-phase signaling protocol has been developed in which three transmitters drive three separate transmission lines. In a voltage-mode embodiment, one transmitter drives it output signal to a high voltage, another transmitter drives its output signal to a mid-level voltage, and a remaining transmitter drives its output signal to a low voltage. The high voltage transmitter and low voltage transmitter may be deemed to form an active pair. From a set of three transmitters, there are three distinct pairs of transmitters that can be active. Within each pair, there are two possibilities depending upon which transmitter is high versus which transmitter is low. There are thus six distinct combinations of output signals in a three-transmitter multi-phase system. Each distinct combination of output signals may be denoted as a multi-phase symbol. Since there are six possible symbols, each transmitted symbol represents 2.5 bits. In this fashion, data transmission speeds may be more than doubled over binary transmission at the same symbol rate using a single channel, albeit at the cost of increased power consumption.
In the receiver for a multi-phase communication system, a frontend circuit decodes the received transmitter output signals to produce the corresponding binary symbol. The six different symbols may be represented by six binary words: [100], [010], [001], [110], [101], and [011]. The bits in these symbols may be represented by the binary variables A, B, and C. For example, the symbol [100] corresponds to A=1, B=0, and C=0. To ensure that one of the three binary variables changes state for every transmitted symbol, no self-transition is allowed. For example, suppose the symbol [001] had just been received. The subsequent symbol cannot be [001] as this would violate the ban against self-transition. In this fashion, a clock can be extracted from every received symbol from the guaranteed binary transition of at least one of the binary signals.
Although a three-transmitter multi-phase system will have less inter-symbol interference (ISI) than a SERDES system operating at the same data rate, inter-symbol interference must still be addressed for a three-transmitter multi-phase system as the data rate is increased ever higher. But conventional equalization techniques are adapted from traditional two-level (high voltage for a binary one and low voltage for a binary zero) signaling. Application of such traditional equalization techniques to a three-transmitter multi-phase system results in over-emphasis that worsens timing jitter and wastes power.
Accordingly, there is a need in the art for a three-transmitter multi-phase system with improved equalization techniques.